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Shift – Registers
Shift – Registers are capable of shifting their binary information in one or both directions. The logical configuration of a Shift – Register consists of a series of flip-flops, with the output of one flip-flop connected to the input of the next flip-flop.
Note: To control the flow of shifts, i.e. the flow of binary information from one register to the next, a common clock is connected to all of the registers connected in series. This clock generates a clock pulse which initiates the shift from one stage to the next.
The following image shows the block diagram of a Shift – Register and its configuration.
The basic configuration of a Shift – Register contains the following points:
- The most general Shift – Registers are often referred to as Bidirectional Shift Register with parallel load.
- A common clock is connected to each register in series to synchronize all operations.
- A serial input line is associated with the left-most register, and a serial output line is associated with the right-most register.
- A control state is connected which leaves the information in the register unchanged even though clock pulses are applied continuously.
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